; Simple DRAM control for a digital delay line
; (c) 2001 René Schmitz
; uzs159@uni-bonn.de
; http://www.uni-bonn.de/~uzs159

; PIN Definitions
; PORT B  = A0 - A7 (Pin12-19)
; PORT D4 = A8
; PORT D0 = 'RAS
; PORT D1 = 'CAS
; PORT D2 = R/'W

.include "c:\programme\Atmel\AVR Studio\1200def.inc"
.cseg
.org 0

	.def NULL = R0     ; this holds a constant 0
	.def ADR0 = R23    ; the lower half of the address
	.def ONE = R1      ; constant 1
	.def ADR1 = R22    ; holds upper half of address
	
RESET:
	ldi R27, $ff     ; 
	clr NULL         ;
	clr ONE        
	inc ONE
	out DDRB, R27
	out DDRD,R27
	out portd,r27    ; make port D all ouputs
	out portb,r27    ; make port B all outputs
	ldi ADR0,0
	ldi ADR1,0
	
; preload bit patterns in registers.
; we have plenty of registers for this simple job
; so why bother with ANDs and ORs
                        
; These also encode the 9-th bit of each half-address in bit 4

	ldi r17, $ef  ; 11101111   ; Asserted: RAS' CAS' R/W'
	ldi r24, $ee  ; 11101110   ; Asserted: CAS' R/W'  
	ldi r25, $ec  ; 11101100   ; Asserted: R/W' 
	ldi r26, $e8  ; 11101000   ; Asserted: None

	ldi r27, $ff  ; 11111111   ; Same as above but A8 = 1
	ldi r28, $fe  ; 11111110
	ldi r29, $fc  ; 11111100
	ldi r30, $f8  ; 11111000
	
	
STRTT:
	out PORTD, r27      	; Start of the cycle all lines are 1s (A8 =1)
	out PORTB, ADR0     	; Send out Row address
        out PORTD, r28		; Strobe it (and set A8 =1)
	nop                     ; takes up time to prevent jitter
	out PORTB, ADR1		; Send column address 
	out PORTD, r29      	; Strobe it and 
	out PORTD, r30		; write it
		
	nop                     ; takes up time to prevent jitter
	nop                     ; takes up time to prevent jitter
				; Total 9 cycles
                                
                                ; Same as above but A8 needs to be set differently
	out PORTD, r17		; Start of the cycle all lines are 1s (A8 =0)
	out PORTB, ADR0		; Send out Row address
	out PORTD, r24          ; Strobe it (and leave A8 = 0)
	out PORTD, r28		; Now change A8 to 1
	out PORTB, ADR1		; Send column address 
	out PORTD, r29		; Strobe it and 
	out PORTD, r30		; write it
	
	add ADR0, ONE           ; inc doesn't set the carry flag 
	adc ADR1, NULL          ; just carry the carry over
				; Total 9 cycles

                                ; You've got the idea by now...
	out PORTD, r17      	; 
	out PORTB, ADR0     	;
	out PORTD, r24		;
	nop                     ;
	out PORTB, ADR1		;
	out PORTD, r25		;
	out PORTD, r26		;
			
	nop                     ; 1
	nop                     ; 1
				; Total 9 cycles

	out PORTD, r27		;
	out PORTB, ADR0		;
	out PORTD, r28          ;
	out PORTD, r24		;
	out PORTB, ADR1		;
	out PORTD, r25		;
	out PORTD, r26		;
	
	rjmp STRTT              ; 2 
				; Total 9 cycles